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- 룰렛 전략18
InterfaceInterface도박 룰렛 전략룰렛 전략18
Overview
The 룰렛 전략18 is designed to support video data conversion from V-by-One®HS input signals into LVCMOS signals. This chip can transmit 32bit video data and 3bits control signals at a pixel clock frequency 20MHz to 85MHz. It has two high-speed data lane and, effective maximum serial data rate is 2.72Gbps/lane up to 1080p/60Hz/30bits colors.
- V-by-One®HS to LVCMOS 전환
- V-by-One®HS 2lanes 입력
3.4Gbps(effective 2.72Gbps)/lane - LVCMOS 2ports output
32bits/pixel - Power Supply: 1.8/3.3V
- Package:TFBGA145
- Operating Temperature: -20 to 85°C
- Recommended Tx:
룰렛 전략15
룰렛 전략17
V-by-One®HSInput | LVCMOS Output | LVCMOS Output Clock Frequency |
---|---|---|
1Lane | 32bit | 20MHz to 85MHs |
2Lane | 32bit | 40MHz to 170MHs |
2Lane | 32bit x2 | 20MHz to 85MHs |
Go to FAQ for this product
다운로드 문서
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Data Sheet
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Design Guide
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Evaluation Board