룰렛 확률 확률F84B Block Diagram

Overview

The 룰렛 확률F84B receiver converts the four LVDS data streams back into 24bits of CMOS/TTL data with wide VCC range(2.5~3.6V) and falling edge clock, suited to not only mid-sized LCD panels but also security camera systems, multi-function Printers, and tablet devices.

  • LVDS to LVCMOS 전환
  • 4chs LVDS 입력
    595Mbps/ch
    LVDS input skew margin ±400ps
  • LVCMOS Parallel output
    28bit/pixel
    Clock Freq. 15 to 85MHz at 3.3V
    based on Falling edge
  • Power Supply: 3.3V
    ※2.5~3.0V available less than 70Mpixel /sec.
  • Package: TSSOP56
    ※Pin Compatible with 룰렛 확률F84A
  • Operating Temperature: -10 to 70°C
  • Recommended Tx:
     룰렛 확률M83D
     룰렛 확률M87
  • Recommended promotive replacement part
    룰렛 확률F84C

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